VLSI Implementation of Artificial Neural Networks— Asurvey
Author:
Affiliation:
1. VLSI Design and CAD Centre, Department of ECE, Amrita Vishwa Vidyapeetham, Coimbatore, India;
2. Nandha Engineering College, Erode, India;
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Mechanics of Materials,Modeling and Simulation,Software
Link
https://www.tandfonline.com/doi/pdf/10.1080/02286203.2010.11442568
Reference50 articles.
1. D. Braendler, T. Hendtlass, & P.O’Donoghue, Deterministic bit-stream digital neurons, IEEE Transactions on Neural Networks, 13(6), 2002, 1514–1525.
2. T. Aoyama, Learning algorithms for a neural network in FPGA , Proceedings of International Joint Conference on Neural Networks, 2002, I, 1007–1012.
3. S. Bade & B.L. Hutchings, FPG A based stochastic neural network implementation, Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, 1994, 189–198.
4. K.M. Hornick, M. Stinchcombe, & H. White, Multilayer feed-forward neural networks are universal approximators, Neural Networks, 2(5), 1985, 141–154.
5. M. Marchesi, G. Orlandi, & F. Piazza, Fast neural networks without multipliers, IEEE Transactions on Neural Networks, 4(1), 1993, 53–62.
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