Analytical Model and Performance Analysis of a Network Interface Card
Author:
Affiliation:
1. 82 Devonshire Street, #V7B, Boston MA 02109 USA:
2. Department of Computer Science and Engineering, Pennsylvania State University, University Park, PA 16802 USA:,
3. Department of Industrial Engineering, Pennsylvania State University;
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Mechanics of Materials,Modeling and Simulation,Software
Link
https://www.tandfonline.com/doi/pdf/10.1080/02286203.2004.11442302
Reference16 articles.
1. M. Banikazemi,V. Moorthy, L. Herger, D. K. Panda, & B. Abali, Efficient virtual interface architecture support for IBM SP switch-connected NT clusters,Proc. Int. Parallel and Distributed Processing Symp., Cancun, Mexico, May 2000.
2. F. Berry, E. Deleganes, & A.M. Merritt,The virtual interface architecture proof-of-concept performance results, IntelCorp, available at ftp://download.intel.com/design/servers/vi/viaproof.pdf.
3. P. Buonadonna, A. Geweke, & D. E. Culler, An implementation and analysis of the virtual interface architecture,Proc. ACM/IEEE Super computing, San Jose, CA, November 1998, 1–15.
4. L. Pry Hi, B. Tourancheau, & R. Westrelin, Modeling of a high speed network to maximize throughput performance: The experience of BIP over Myrinet, in H.R. Arabnia (ed.),Parallel and Distributed Processing Techniques and Applications (PDPTA '98), vol. 2, Las Vegas, NV, 1998, 341–349.
5. D. Ponomarev, K. Ghose, & E. Saksonov, Optimal polling for latency-throughput tradeoffs in queue-based network interfaces for clusters,7th ACM Euro-Par Conf., Manchester, UK; published asLNCS 2150ISBN 3-540-42495-4 (Springer-Verlag, 2001), 86–95.
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