Efficient LRU Algorithm for Cache Scheduling in a Disk Array System
Author:
Affiliation:
1. Department of EE-System, EEB-104, University of Southern California, Los Angeles, CA, 90089, USA; e-mail: {, } (paper no. 202-1119)
Publisher
Informa UK Limited
Subject
Computer Graphics and Computer-Aided Design,Computer Science Applications,Hardware and Architecture,Software
Link
https://www.tandfonline.com/doi/pdf/10.1080/1206212X.2000.11441616
Reference14 articles.
1. J. Gray, B. Horst, & M. Walker, Parity striping of disk arrays: low-cost reliable storage with acceptable throughput,Proc. of the 16th VLDB Conf., Brisbane, Australia, Aug. 1990, 148-159.
2. J.L. Hennessy & D.A. Patterson,Computer architecture: A quantitative approach, (San Mateo, CA: Morgan Kaufmann, 1998).
3. P. Biswas, K.K. Ramakrishnan, & D. Towsley, Trace driven analysis of write caching policies for disks,Proc. of the 1993 ACM SIGMETRICS Conf. on Measurement and Modeling of Computer Systems, Santa Clara, CA, May 1993, 13-23.
4. D.G. Feitelson, P.F. Corbett, & J.P. Prost, Performance of the Vesta parallel file system,Proc. of 9th Int. Parallel Processing Symp., Santa Barbara, CA, April 1995, 150-158.
5. K. Skadron & D.W. Clark, Design issues and tradeoffs for write buffers,Proc. 3rd Int. Symp. on High-Performance Computer Architecture, San Antonio, TX, Feb. 1997, 144-155.
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