Adaptive Methods to Minimize Decompression Overhead for Compressed On-Chip Caches-Reference-Cited by-同舟云学术

Adaptive Methods to Minimize Decompression Overhead for Compressed On-Chip Caches

Published:2003-01 Issue:2 Volume:25 Page:98-105
ISSN:1206-212X
Container-title:International Journal of Computers and Applications
language:en
Short-container-title:International Journal of Computers and Applications

Author:

Lee J.-S.¹,Hong W.-K.¹,Kim S.-D.¹

Affiliation:

1. Super Computing Laboratory, Department of Computer Science, Yonsei University, 134 Shinchon-Dong, SeodaemunKu, Seoul 120-749, Korea; e-mail: {, },

Publisher

Informa UK Limited

Subject

Computer Graphics and Computer-Aided Design,Computer Science Applications,Hardware and Architecture,Software

Link

https://www.tandfonline.com/doi/pdf/10.1080/1206212X.2003.11441690

Reference9 articles.

1. T.A. Welch, A technique for high-performance data compression,IEEE Computer, 17(6), 1984, 8-18.

2. J. Ziv&A. Lempel, A universal algorithm for sequential data compression,IEEE Transaction on Information Theory, 23{$), 1997, 337-343.

3. S. Bunton & G. Borriello. Practical dictionary management for hardware data compression,Communications of the A CM, 35(1), 1992, 95-104.

4. S. Jones, 100Mbit/s adaptive data compressor design using selectively shiftable content-addressable memory,Proc. of the Institution of Electrical Engineers, 139(A), 498-502.

5. M. Kjelso, M. Gooch, & S. Jones,Design and 'performance of a main memory hardware data compressor, IEEE Computer Society, Prague, September 1996, 422-430.

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Dynamic Dictionary-Based Data Compression for Level-1 Caches;Architecture of Computing Systems - ARCS 2006;2006

2. A Unified Compressed Cache Hierarchy Using Simple Frequent Pattern Compression and Partial Cache Line Prefetching;Embedded Software and Systems