Advanced gate driving concepts and switching optimization for SiC semiconductors
Author:
Affiliation:
1. Department of Electric Machines, Drives and Automation, Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia
Publisher
Informa UK Limited
Link
https://www.tandfonline.com/doi/pdf/10.1080/00051144.2024.2362525
Reference35 articles.
1. An Experimental Investigation of the Tradeoff between Switching Losses and EMI Generation With Hard-Switched All-Si, Si-SiC, and All-SiC Device Combinations
2. Analytical Loss Model for Three-Phase 1200V SiC MOSFET Inverter Drive System Utilizing Miller Capacitor-Based dv/dt-Limitation
3. An Overview of Advanced Gate Driver Concepts for SiC Semiconductors
4. Hegarty T. Texas instruments The engineer's guide To EMI In DC-DC converters (Part 3): understanding power stage parasitics. Application note; March 2018.
5. Kovacevic-Badstuebner I Stark R Grossner U et al. Parasitic extraction procedures for SiC power modules. In: CIPS 2018; 10th International Conference on Integrated Power Electronics Systems. Stuttgart Germany; 2018. p. 1–6.
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