The application of map-entered variables to the use of multiplexers in the synthesis of logic functions-Reference-Cited by-同舟云学术

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The application of map-entered variables to the use of multiplexers in the synthesis of logic functions

Published:1978-10 Issue:4 Volume:45 Page:373-379
ISSN:0020-7217
Container-title:International Journal of Electronics
language:en
Short-container-title:International Journal of Electronics

Author:

BENNETT L. A. M.

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Link

http://www.tandfonline.com/doi/pdf/10.1080/00207217808900923

Reference4 articles.

1. HURST , S. L. , 1977 , Conference on Recent Developments in Digital Logic Design , Paper No. 7 , University of Bath .

2. Algorithm for logic-circuit synthesis by using multiplexers

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Multi-Level Logic Synthesis Based on Kronecker Decision Diagrams and Boolean Ternary Decision Diagrams for Incompletely Specified Functions;VLSI Design;1995-01-01

2. Synthesis of multilevel multiplexer circuits for incompletely specified multioutput Boolean functions with mapping to multiplexer based FPGA's;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;1993

3. Reed-Muller expansions of incompletely specified functions;IEE Proceedings E Computers and Digital Techniques;1987

4. Use of multiplexers in direct synthesis of ASM-based designs;IEE Proceedings E Computers and Digital Techniques;1986

5. Fast analysis of MUX synthesis of logical functions from the splitting frontiers of the Karnaugh map;International Journal of Electronics;1985-09

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