Implementation of FPGA design of FFT architecture based on CORDIC algorithm-Reference-Cited by-同舟云学术

Implementation of FPGA design of FFT architecture based on CORDIC algorithm

Published:2021-02-27 Issue:11 Volume:108 Page:1914-1939
ISSN:0020-7217
Container-title:International Journal of Electronics
language:en
Short-container-title:International Journal of Electronics

Author:

Chandra Inguva Sharath¹,Seventiline J.B.²

Affiliation:

1. Assistant Professor, Department of Electronics and Communication Engineering, St.Peter's Engineering College, Hyderabad, India

2. Professor, Department of Electrical, Electronics and Communication Engineering, Gitam Institute of Technology, GITAM(Deemed to be University), Visakhapatnam Campus, Andhra Pradesh, India

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Link

https://www.tandfonline.com/doi/pdf/10.1080/00207217.2020.1870750

Reference44 articles.

1. Efficient VLSI Implementation of CORDIC-Based Multiplier Architecture

2. Implementation of Fingerprint Based Biometric System Using Optimized 5/3 DWT Architecture and Modified CORDIC Based FFT

3. A CORDIC-Based Low-Power Statistical Feature Computation Engine for WSN Applications

4. FPGA implementation of high-performance, resource-efficient Radix-16 CORDIC rotator based FFT algorithm

5. Configurable Floating‐Point FFT Accelerator on FPGA Based Multiple‐Rotation CORDIC

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