Process independent automated sizing methodology for current steering DAC
Author:
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/00207217.2014.989924
Reference50 articles.
1. Abebe, H. & Tyree, V. C. (2000, October).BSIM3v3.1 model parameters extraction and optimization. USC-ISI, MOSIS service technical report.
2. Characterization of a CMOS current-steering DAC using state-space models
3. Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters
4. Neural network-based design approach for submicron MOS integrated circuits
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