High performance VLSI CORDIC algorithms, architecture and chip design-Reference-Cited by-同舟云学术

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High performance VLSI CORDIC algorithms, architecture and chip design

Published:1987-07 Issue:5 Volume:10 Page:493-502
ISSN:0253-3839
Container-title:Journal of the Chinese Institute of Engineers
language:en
Short-container-title:Journal of the Chinese Institute of Engineers

Author:

Sung Tze‐Yun,Parng Tai‐Ming,Hu Yu‐Hen

Publisher

Informa UK Limited

Subject

General Engineering

Link

http://www.tandfonline.com/doi/pdf/10.1080/02533839.1987.9677002

Reference10 articles.

1. Highly concurrent computing structures for matrix arithmetic and signal processing

2. Ahmed, H.M. 1982. “Signal Processing Algorithms and Architectures”. 69–144. Stanford, CA.: Electrical Engineering Department, Stanford University. Ph. D. Dissertation

3. Scattering Arrays For Matrix Computations

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