Energy Minimization Under Area and Performance Constraints for Multimedia Applications Realized on Embedded Cores
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Published:2002-01-01
Issue:3
Volume:14
Page:273-286
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ISSN:1065-514X
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Container-title:VLSI Design
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language:en
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Short-container-title:VLSI Design
Author:
Zervas N. D.1,
Masselos K.1,
Karayiannis Y. A.1,
Goutis C. E.1
Affiliation:
1. VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras, Rio 26500, Greece
Abstract
A systematic methodology for energy dissipation reduction of multimedia applications realized on architectures based on embedded cores and application specific data memory organization is proposed. Performance and area are explicitly taken into account. The proposed methodology includes two major steps: A high-level code transformation step that reorganizes the original description of the target application. The second major step includes the determination of the processor, memory and bus organization of the system and is briefly described. Experimental results from several real-life demonstrators prove the impact of the high level step of the proposed methodology.
Publisher
Hindawi Limited
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Hardware and Architecture