A Comparative Study on Automated Fault—Tolerant Route Discovery with Congestion Control Using TFRF Model for 3-D Network-on-Chips
Author:
Affiliation:
1. Computer Science/IT Department, UPES, Dehradun;
2. Department of Virtualization, UPES, Dehradun;
3. University of Petroleum and Energy Studies, Dehradun;
4. Institute of Electrical and Electronic Engineers, Amity University, UAE
Publisher
Informa UK Limited
Subject
Law,Safety Research,Safety, Risk, Reliability and Quality,Education
Link
https://www.tandfonline.com/doi/pdf/10.1080/19361610.2019.1621594
Reference25 articles.
1. Adaptive fault-tolerant architecture and routing algorithm for reliable many-core 3D-NoC systems
2. Wearout Resilience in NoCs Through an Aging Aware Adaptive Routing Algorithm
3. Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems
4. ERSA: Error Resilient System Architecture for Probabilistic Applications
5. A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors
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