Analytical Modelling and Performance Analysis of Dielectric Pocket-Induced Double-Gate Tunnel Field-Effect Transistor
Author:
Affiliation:
1. Department of Electronics & Telecommunication Engineering, Jadavpur University, Kolkata, India
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
https://www.tandfonline.com/doi/pdf/10.1080/02564602.2017.1381049
Reference21 articles.
1. Temperature-Dependent $I$– $V$ Characteristics of a Vertical $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ Tunnel FET
2. 2D-2D tunneling field-effect transistors using WSe2/SnSe2 heterostructures
3. Two dimensional analytical modeling for asymmetric 3T and 4T double gate tunnel FET in sub-threshold region: Potential and electric field
4. Design of GeSn-Based Heterojunction-Enhanced N-Channel Tunneling FET With Improved Subthreshold Swing and ON-State Current
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3. Investigating linearity and effect of temperature variation on analog/RF performance of dielectric pocket high-k double gate-all-around (DP-DGAA) MOSFETs;Applied Physics A;2020-08-28
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