Timing Closure Problem: Review of Challenges at Advanced Process Nodes and Solutions
Author:
Affiliation:
1. Department of ECE, IIIT, Delhi, India
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
https://www.tandfonline.com/doi/pdf/10.1080/02564602.2018.1531733
Reference22 articles.
1. Techniques for Fast Physical Synthesis
2. Advanced ASIC Chip Synthesis
3. Statistical Timing Analysis: From Basic Principles to State of the Art
4. Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology
5. Timing-driven maze routing
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