High-reliability and low-noise amorphous-silicon gate with a novel clock-driving methodology
Author:
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering,General Materials Science
Link
http://www.tandfonline.com/doi/pdf/10.1080/15980316.2013.872704
Reference1 articles.
1. Dynamic Characteristic Optimization of 14 a-Si:H TFTs Gate Driver Circuit Using Evolutionary Methodology for Display Panel Manufacturing
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Optimal design of a novel amorphous silicon gate driver circuit using a TFT-circuit-simulation-based multi-objective evolutionary algorithm;Journal of Information Display;2016-02-19
2. Low Power and High Driving Capability of Amorphous Silicon Gate Driver Circuit;Journal of Display Technology;2016-01
3. Circuit-Simulation-Based Multi-Objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits Under Multilevel Clock Driving;Journal of Display Technology;2015-08
4. Design, Fabrication and Characterization of Low-Noise and High-Reliability Amorphous Silicon Gate Driver Circuit for Advanced FPD Applications;Journal of Display Technology;2015-08
5. Circuit-Simulation-Based Multi-objective Evolutionary Algorithm with Multi-Level Clock Driving Technique for a-Si:H TFTs Gate Driver Circuit Design Optimization;FRONT ARTIF INTEL AP;2015
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