Experimental study on input and bottleneck scheduling for a semiconductor fabrication line
Author:
Publisher
Informa UK Limited
Subject
Industrial and Manufacturing Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/07408170208928860
Reference26 articles.
1. OR Practice—Development and Implementation of a Scheduling System for a Wafer Fabrication Facility
2. Trade-offs in cycle time management: hot lots
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