An optimised dynamic bottleneck dispatching policy for semiconductor wafer fabrication
Author:
Affiliation:
1. a Department of Industrial Engineering and Management , Shanghai Jiao Tong University , 800 Dong Chuan Road, 200240 Shanghai, China
Publisher
Informa UK Limited
Subject
Industrial and Manufacturing Engineering,Management Science and Operations Research,Strategy and Management
Link
https://www.tandfonline.com/doi/pdf/10.1080/00207540701805638
Reference21 articles.
1. Petri-net and GA-based approach to modeling, scheduling, and performance evaluation for wafer fabrication
2. Modeling, scheduling, and performance evaluation for wafer fabrication: a queueing colored Petri-net and GA-based approach
3. A new scheduling approach using combined dispatching criteria in wafer fabs
4. Simultaneous Optimization of Several Response Variables
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