Low-temperature back-end-of-line technology compatible with III-V nanowire MOSFETs

Author:

Andric Stefan1,Ohlsson Fhager Lars1,Lindelöw Fredrik1,Kilpi Olli-Pekka1,Wernersson Lars-Erik1ORCID

Affiliation:

1. Department of Electrical and Information Technology, Lund University, Box 118, 221 00 Lund, Sweden

Funder

Stiftelsen för Strategisk Forskning

H2020 LEIT Information and Communication Technologies

Publisher

American Vacuum Society

Subject

Materials Chemistry,Electrical and Electronic Engineering,Surfaces, Coatings and Films,Process Chemistry and Technology,Instrumentation,Electronic, Optical and Magnetic Materials

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Lateral III–V Nanowire MOSFETs in Low-Noise Amplifier Stages;IEEE Transactions on Microwave Theory and Techniques;2022-02

2. Thermal stability of monolayer WS2 in BEOL conditions;Journal of Physics: Materials;2021-01-08

3. Millimeter-Wave Vertical III-V Nanowire MOSFET Device-to-Circuit Co-Design;IEEE Transactions on Nanotechnology;2021

4. The Role of Oxide Traps Aligned With the Semiconductor Energy Gap in MOS Systems;IEEE Transactions on Electron Devices;2020-10

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