Kavach: Lightweight masking techniques for polynomial arithmetic in lattice-based cryptography

Author:

Aikata Aikata,Basso Andrea,Cassiers Gaetan,Mert Ahmet Can,Sinha Roy Sujoy

Abstract

Lattice-based cryptography has laid the foundation of various modern-day cryptosystems that cater to several applications, including post-quantum cryptography. For structured lattice-based schemes, polynomial arithmetic is a fundamental part. In several instances, the performance optimizations come from implementing compact multipliers due to the small range of the secret polynomial coefficients. However, this optimization does not easily translate to side-channel protected implementations since masking requires secret polynomial coefficients to be distributed over a large range. In this work, we address this problem and propose two novel generalized techniques, one for the number theoretic transform (NTT) based and another for the non-NTT-based polynomial arithmetic. Both these proposals enable masked polynomial multiplication while utilizing and retaining the small secret property.For demonstration, we used the proposed technique and instantiated masked multipliers for schoolbook as well as NTT-based polynomial multiplication. Both of these can utilize the compact multipliers used in the unmasked implementations. The schoolbook multiplication requires an extra polynomial accumulation along with the two polynomial multiplications for a first-order protected implementation. However, this cost is nothing compared to the area saved by utilizing the existing cheap multiplication units. We also extensively test the side-channel resistance of the proposed design through TVLA to guarantee its first-order security.

Publisher

Universitatsbibliothek der Ruhr-Universitat Bochum

Subject

Artificial Intelligence,Computer Graphics and Computer-Aided Design,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Software

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum Cryptography;Proceedings of the 19th ACM Asia Conference on Computer and Communications Security;2024-07

2. Sparse Polynomial Multiplication-Based High-Performance Hardware Implementation for CRYSTALS-Dilithium;2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2024-05-06

3. Lattice-Based Cryptography and NTRU: Quantum-Resistant Encryption Algorithms;2024 International Conference on Emerging Systems and Intelligent Computing (ESIC);2024-02-09

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