1. J. Rabaey, S. Pope, and R. Brodersen, “An integrated automated layout generation system for DSP circuits,”IEEE Trans. on CAD, vol. CAD4, 1985, pp. 285–296.
2. B.S. Haroun et al., “SPAID: an architectural synthesis tool for DSP custom applications,”IEEE Journal of Solid-State Circuits, vol. 24, no. 2, 1989, pp. 426–435.
3. P. Marwedel, “The MIMOLA design system: Tools for the design of digital processors,”Proceedings of the 23rd Design Automation Conference, 1986, pp. 587–593.
4. W. Rosenstiel, “CADDY: The Karlsruhe behavioral synthesis system,” presented at theACM/IEEE High-Level Synthesis Workshop, Orcas Island, WA, January 1988.
5. L. Stok and R. van den Born, “EASY: multiprocessor architecture optimization,”Proc. International Workshop Logic and Architecture Synthesis for Silicon Compilers, Grenoble, France, May 1988.