An on-chip glitchy-clock generator for testing fault injection attacks-Reference-Cited by-同舟云学术

An on-chip glitchy-clock generator for testing fault injection attacks

Published:2011-10-21 Issue:4 Volume:1 Page:265-270
ISSN:2190-8508
Container-title:Journal of Cryptographic Engineering
language:en
Short-container-title:J Cryptogr Eng

Author:

Endo Sho,Sugawara Takeshi,Homma Naofumi,Aoki Takafumi,Satoh Akashi

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Software

Link

http://link.springer.com/content/pdf/10.1007/s13389-011-0022-y.pdf

Reference16 articles.

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2. Yen S.M., Joye M.: Checking before output may not be enough against fault-based cryptanalysis. IEEE Trans. Comput. 49(9), 967–970 (2000)

3. Biham E., Shamir A.: Differential fault analysis of secret key cryptosystems. CRYPTO 1294, 513–525 (1997)

4. Clavier C.: Secret external encodings do not prevent transient fault analysis. LNCS 4727, 181–194 (2007)

5. Bar-El, H., Choukri, H., Naccache, D., Tunstall, M., Whelan, C.: The sorcerer’s apprentice guide to fault attack. IACR ePrint archive, vol. Report 2004/100, pp. 1–13 (2004)

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