Author:
Choudhary Mitul Kumar,Raturi Ashish,Mittal Poornima
Publisher
Springer Nature Singapore
Reference17 articles.
1. Bui, H.T., Wang, Y.: New 4-transistors XOR, and XNOR designs. In: Proceedings of the 2nd IEEE Asia Pacific Conference, ASIC, pp. 25–28 (2000)
2. Kaarthik, K., Vivek, C.: Hybrid Han Carlson adder architecture for reducing power and delay. Middle-East J. Sci. Res. 24(Special Issue on Innovations in Information, Embedded and Communication Systems), 308–313 (2016)
3. Zimmermann, R., Fichtner, W.: Low-power logic styles: CMOS versus pass-transistor logic. Solid-State Circ. IEEE J. 32, 1079–1090 (1997)
4. Wairya, S., Nagaria, R.K., Tiwari, S.: Comparative performance analysis of XOR-XNOR function based high-speed CMOS full adder circuits for low voltage VLSI design. Int. J. VLSI Des. Commun. Syst. (VLSICS) 3(2) (2012)
5. Qu, L., Cui, X., Xu, X., Cui, X., Ma, Y.: The multi-input MRL logic gate and its application. In: IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), pp. 1–2, June 2019