Hardware Implementation of Three-Layered Perceptron Using FPGA
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-99-7383-5_7
Reference25 articles.
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4. Bahoura M, Park C (2011) FPGA-implementation of high-speed MLP neural network, pp 426–429
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