Author:
Asthana Prateek,Kushwaha Ritesh Kumar,Sahu Anil Kumar,Misra Neeraj Kumar
Publisher
Springer Nature Singapore
Reference7 articles.
1. Akashe S, Mudgal A, Singh SB (20122) Analysis of power in 3T dram and 4T dram cell design for different technology. In: 2012 world congress on information and communication technologies. IEEE, pp 18–21
2. Asthana P (2020) Analysis of dram cell designs for nanometer-scale memories
3. Asthana P, Mangesh S (2014) Capacitor less dram cell design for high performance embedded system. In: 2014 international conference on advances in computing, communications and informatics (ICACCI). IEEE, pp 554–559
4. Asthana P, Mangesh S (2014) Design and implementation of 4T, 3T and 3T1D dram cell design on 32 nm technology. Int J VLSI Des Commun Syst 5(4):47
5. Asthana P, Mangesh S (2014) Performance comparison of 4T, 3T and 3T1D dram cell design on 32 nm technology. JSSATE, ICCSEA, SPPR, VLSI, WiMoA, SCAI, CNSA, WeST, pp 121–133