Nanoscale Multi-gate Graded Channel DG-MOSFET for Reduced Short Channel Effects
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-99-9562-2_54
Reference5 articles.
1. Mohapatra SK, Pradhan KP, Sahu PK (2014) Impact of dual material gate and lateral asymmetric channel in GS-DG-MOSFET. Int J Nano Biomater 5(4):196–205
2. Ramesh R (2017) Influence of gate and channel engineering on multigate MOSFETs-a review. Microelectron J 66:136–154
3. Panigrahy S, Sahu PK (2013) Performance enhancement and reduction of short channel effects of nano-MOSFET by using graded channel engineering. In: 2013 international conference on circuits, power and computing technologies (ICCPCT). IEEE, pp 787–792
4. Abdi MA, Djeffal F, Meguellati M, Arar D (2009) Two-dimensional analytical threshold voltage model for nanoscale Graded Channel Gate Stack DG MOSFETs. In: 2009 16th IEEE international conference on electronics, circuits and systems-(ICECS 2009). IEEE, pp 892–895
5. Mendiratta N, Tripathi SL (2020) A review on performance comparison of advanced MOSFET structures below 45 nm technology node. J Semicond 41(6):061401
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