High-Speed Transmitter Designs for DDR3 SDRAM Memory Interfaces
Author:
Publisher
Springer Singapore
Link
http://link.springer.com/content/pdf/10.1007/978-981-4585-42-2_42
Reference14 articles.
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5. Lim, ZZ, Mustaffa MT, Navaratnam N (2012) A 2.4 Gbps transmitter with programmable de-emphasis scheme for DDR3 memory interface. In: IEEE international conference on 4th intelligent and advanced systems, Kuala Lumpur, vol 2. pp 713–718
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