Design and Application of Bad Block Management Strategy for On-Board Solid-State Memory
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-9968-0_40
Reference8 articles.
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3. Supriya, H.: Study of bad block management and wear leveling in NAND flash memories. Int. J. Res. Eng. Technol. 2(10), 284–288 (2013)
4. Cai, Y., Mutlu, O., Haratsch, E.: Program interference in MLC NAND flash memory: characterization, modeling and mitigation. In: IEEE 31st International Conference on Computer Design (ICCD), pp. 123–130 (2013)
5. Chihiro, M., Ken, T.: Dynamic adjustment of storage class memory capacity in memory-resource disaggregated hybrid storage with SCM and NAND flash memory. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 27(8), 1709–1810 (2019)
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