Author:
Sharma Amit,Chand Sansar,Gill Navneet
Reference11 articles.
1. International Technology Roadmap for Semiconductor (lTRS), WO I Version
2. Yu, B., Wang, H., Joshi, A., Xiang, Q., Ibok, E., Lin, M.-R.: 15-nm gate length planar CMOS transistor. In: Tech. Dig. IEDM, p. 937 (2001)
3. Taur, Y.: JEEE SpectruIII, vo1. 36, no. 7, pp. 25–29 (1999)
4. Tosaka, T., Suzuki, K., Horie, H., Sugii, T.: Scaling parameter dependent model for sub-threshold swing S in double-gate SOI MOSFET’s. IEEE Electron Device Lett. 15(11), 466–468 (1994)
5. Wong, H.-S.P.: Beyond the conventional MOSFET. In: Proceedings of 31st European Solid-State Device Research Conference, p. 69 (2001)