FPGA-Based Efficient Implementation of CBNS Computational Circuits: A Modular Approach
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Publisher
Springer Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-4035-3_10
Reference13 articles.
1. Miguens MP, Chaves R, Sousa L (2015) Arithmetic-based binary-to-RNS converter modulo $$2^n pm k$$ for jn -bit dynamic range. IEEE Trans VLSI Syst 23(3):603–607
2. Jamil T (2011) An introduction to complex binary number system. In: Processing of international conference on information and computing (ICIC), pp 229–232
3. Sengupta A, Natarajan B (2013) Performance of systematic RRNS based space-time block codes with probability-aware adaptive demapping. IEEE Trans Wirel Comm 12(5):2458–2469
4. Zhang S, Zhang Y, Yang LL (2011) Redundant residue number system based multicarrier DS-CDMA for dynamic multiple-access in cognitive radios. In: Processing of IEEE vehicular technology conference (VTC Spring), pp 1–5
5. Parhi M, Yingjie L, Parhi KK (2014) Canonic real-valued FFT structures. In: Processing of Asilomar conference on signals, systems and computers, pp 1261–1265
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