High Speed, High-Reliability Edge Combiner Frequency Multiplier for Silicon on Chip
Author:
Publisher
Springer Singapore
Link
http://link.springer.com/content/pdf/10.1007/978-981-13-1906-8_32
Reference19 articles.
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3. Elgebaly M, SachdevM (2007) Variation-aware adaptive voltage scaling system. IEEE Trans Very Large Scale Integr (VLSI) Syst 15(5):560–571
4. Kim C, Hwang IC, Kang SM (2002) A low-power small-area, 7.28-ps-jitter 1-GHz DLL-based clock generator. IEEE J Solid-State Circuits 37(11):1414–1420
5. Chien G, Gray PR (2000) A 900-MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications. IEEE J Solid-State Circuits 35(12):1996–1999
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