FPGA Implementation of Radix-2 Pipelined FFT Algorithm for High-throughput Applications
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-1111-8_57
Reference10 articles.
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3. Wold EH, Despain AM (1984) Pipeline and parallel-pipeline FFT processors for VLSI implementation. IEEE Trans Comput C-33(5):414–426
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5. Qureshi F, Gustafsson O (2017) Efficient FPGA mapping of pipeline SDF FFT cores. IEEE Trans Very Large Scale Integr (VLSI) Syst 25(9):2486–2497
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