Author:
Jayanthy S.,Bhuvaneswari M. C.
Reference6 articles.
1. M.C. Bhuvaneswari, S. Jayanthy, Cross-talk delay fault test generation, in Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems (Springer, 2015), ISBN 978-81-322-1958-3
2. S. Jayanthy, M.C. Bhuvaneswari, M. Prabhu, Simulation based ATPG for low power testing of crosstalk delay faults in asynchronous circuits. Int. J. Comput. Appl. Technol. 48(3), 241–252 (2013)
3. S. Jayanthy, M.C. Bhuvaneswari, Fuzzy Delay Model Based Fault Simulator for Crosstalk Delay Fault Test Generation in Asynchronous Sequential Circuits, vol. 40, Part 1 (Sadhana Indian Academy of Sciences, Feb 2015), pp. 107–119
4. F. Shi, Y. Makris, SPIN-SIM: logic and fault simulation for speed-independent circuits, in Proceedings of International Test Conference (2004)
5. F. Shi, Y. Makris, Testing delay faults in asynchronous handshake circuits, in Proceedings of ICCAD’06 (5–9 Nov 2006)