Energy Efficient SRAM Design Using FinFETs and Potential Alteration Topology Schemes
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Publisher
Springer Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-6940-8_6
Reference13 articles.
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4. N. Jha, Parasitics-aware design of symmetric and asymmetric gate-work function FinFET SRAMs. IEEE Trans. VLSI Sys. 22(3), 548–561 (2014)
5. A. Carlson, Z. Guo, S. Balasubramanian, SRAM read/write margin enhancements using FinFETs. IEEE Trans. VLSI Syst. 18(6), 887–900 (2015)
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Designing power‐efficient SRAM cells with SGFinFETs using LECTOR technique;Software: Practice and Experience;2023-12-04
2. A Comparative Analysis of FinFET Based SRAM Design;International Journal of Electrical and Electronics Research;2022-12-30
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