A New Prefetching Unit for Digital Signal Processor-Reference-Cited by-同舟云学术

A New Prefetching Unit for Digital Signal Processor

Published:2022 Issue: Volume: Page:928-935
ISSN:1876-1100
Container-title:Proceeding of 2021 International Conference on Wireless Communications, Networking and Applications
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Author:

Ji Rongju,Ren Haoqi

Abstract

AbstractIn this paper, a new structure of instruction prefetching unit is proposed. The prefetching is achieved by building the relationship between the branch source and its branch target and the relationship between the branch target and the first branch in its following instruction sequence. With the help of the proposed structure, it is easy to know whether the instruction block of branch target blocks exist in the instruction cache based on the recorded branch information. The two-level depth target prefetching can be performed to eliminate or reduce the instruction cache miss penalty. Experimental results demonstrate that the proposed instruction prefetching scheme can achieve lower cache miss rate and miss penalty than the traditional next-line prefetching technique.

Publisher

Springer Nature Singapore

Link

https://link.springer.com/content/pdf/10.1007/978-981-19-2456-9_94

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