Design and Implementation of Argo NI-NoC Micro-architecture for MPSoC Using GALS Architecture-Reference-Cited by-同舟云学术

Design and Implementation of Argo NI-NoC Micro-architecture for MPSoC Using GALS Architecture

Published:2019-09-25 Issue: Volume: Page:451-463
ISSN:1876-1100
Container-title:Lecture Notes in Electrical Engineering
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Author:

Shashidhara H. R.,Nagendra Prasad S.,Prabhudeva B. L.,Kulkarni Subhash S.

Publisher

Springer Singapore

Link

http://link.springer.com/content/pdf/10.1007/978-981-13-8942-9_37

Reference49 articles.

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3. Clermidy F et al (2010) A 477 mW NoC-based digital baseband for MIMO 4G SDR. In: IEEE international solid-state circuits conference on digital technical papers, pp 278–279

4. Howard J et al (2011) A 48-core IA-32 processor in 45 nm CMOS using on-die message-passing and DVFS for performance and power scaling. IEEE J Solid-State Circuits 46(1):173–183

5. Plana LA et al (2011) SpiNNaker: design and implementation of a GALS multicore system-on-chip. ACM J Emerg Technol Comput Syst 7(4), Art. ID 17

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