Design a 4-Bit Carry Look-Ahead Adder Using Pass Transistor for Less Power Consumption and Maximization of Speed

Author:

Khan Burhan,Pattanaik Suraj

Publisher

Springer Singapore

Reference10 articles.

1. T. Veeramani, B. Alekhya, P. Surekha, Analysis of different CMOS adders using 90 nm and 180 nm technology. Int. J. Innov. Eng. Technol. (IJIET), 177–182 (2016). ISSN: 2319-1058

2. J. Samanta, M. Halder, B.P. De, Performance analysis of high speed low power carry look ahead adder using different logic style. Int. J. Soft Comput. Eng. 2(6), 330–336 (2013). ISSN: 2231-2307

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4. N. Jain, P. Gour, B. Shrman, A high speed low power adder in multi output domain logic. Int. J. Sci. Res. Eng. Technol., 16–18 (2014). ISSN: 2278-0882

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1. Design of 4-bit absolute value detector with low energy;Journal of Physics: Conference Series;2023-11-01

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