1. Hsia SC, Lee WC (2005) A very low-power Flash A/D converter based on CMOS inverter circuit. In: Proceedings of the 9th international database engineering & application symposium (IDEAS’05). IEEE, pp 107–110
2. Ali SM, Raut R, Sawan M (2005) A power efficient decoder for 2 GHz, 6-bit CMOS Flash-ADC architecture. In: Proceedings of the 9th international database engineering & application symposium (IDEAS’05). IEEE, pp 123–126
3. Sung BRS et al (2009) A time-interleaved flash-SAR architecture for high speed A/D conversion. IEEE, pp 984–987
4. Hiremath V, Ren S (2011) A novel ultra high speed reconfigurable switching encoder for Flash ADC. In: IEEE Aerospace and electronics conference (NAECON), pp 320–323
5. Reddy MS, Rahaman ST (2013) An effective 6-bit Flash ADC using low power CMOS technology. In: 15th international conference on advanced computing technologies (ICACT). IEEE, pp 1–4.