Efficient Quantum Circuit for Karatsuba Multiplier
Author:
Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-19-9530-9_5
Reference18 articles.
1. E. Munoz-coreas, H. thapliyal, Quantum circuit design of a t-count optimized integer multiplier. IEEE Trans. Comput. 68 (5), (2020)
2. S. Kotiyal, H. Thapliyal, N. Ranganathan, Circuit for reversible quantum multiplier based on binary tree optimizing ancilla and garbage bits, in 2014 27th International conference on VLSI design and 2014 13th International conference on embedded systems, (2014), pp. 545–550
3. H. M. H. Babu, Cost-efficient design of a quantum multiplier—accumulator unit. Quantum Inf. Process. 16(1), (2016), Art. No. 30
4. S. Dutta, Y. Tavva, D. Bhattacharjee, A. Chattopadhyay, Efficient quantum circuits for square-root and inverse square-root, in 2020 33rd International conference on vlsi design and 2020 19th International conference on embedded systems (vlsid), (2020), pp. 55–60. https://doi.org/10.1109/vlsid49098.2020.00027
5. P. N. Singh, S. Aarthi, Quantum circuits—an application in qiskit-python, in 2021 third international conference on intelligent communication technologies and virtual mobile networks (icicv), (2021), pp. 661–667
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