PERAM: Ultra Power Efficient Array Multiplier Using Reversible Logic for High-Performance MAC
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Publisher
Springer Singapore
Link
http://link.springer.com/content/pdf/10.1007/978-981-15-7345-3_64
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5. Toan NV, Lee J-G (2020) FPGA-based multi-level approximate multipliers for high-performance error-resilient applications, IEEE Access 8:25481–25497
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1. Efficient RNS Realization of High-Speed Arithmetic Multiplier with Respect to Cryptographic Computation;Lecture Notes in Networks and Systems;2022-11-14
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