Performance Analysis of Array Multiplier Using Reversible Logic

Author:

Hemalatha K. N.,Sangeetha B. G.

Publisher

Springer Nature Singapore

Reference50 articles.

1. Landauer R (1961) Irreversibility and heat generation in the computational process. IBM J Res Dev 5:183–191

2. Bennett CH (1973) Logical reversibility of computation. IBM J Res Dev 17:525–532

3. Kerntopf P, Perkowski MA, Khan MHA (2004) On universality of general reversible multiple valued logic gates. In: IEEE proceeding of the 34th international symposium on multiple valued logic (ISMVL’04), pp 68–73

4. Perkowski M, Al-Rabadi A, Kerntopf P, Buller A, Chrzanowska-Jeske M, Yanushkevich VS, Jozwiak L (2001) A general decomposition for reversible logic. In: Proceedings of RM, Starkville, pp 119–138

5. Perkowski M, Kerntopf P (2001) Reversible logic. Invited tutorial. In: Proceedings of EURO-MICRO, Warsaw, Poland

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