A True Single-Phase Error Masking Flip-Flop with Reduced Clock Power for Near-Threshold Designs
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Springer Singapore
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http://link.springer.com/content/pdf/10.1007/978-981-32-9767-8_32
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1. Design and Analysis of Leakage-Induced False Error Tolerant Error Detecting Latch for Sub/Near-Threshold Applications;IEEE Transactions on Device and Materials Reliability;2020-06
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