Design and Physical Implementation of Mixed Signal Elapsed Time Counter in 0.18 µm CMOS Technology-Reference-Cited by-同舟云学术

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Design and Physical Implementation of Mixed Signal Elapsed Time Counter in 0.18 µm CMOS Technology

Published:2019 Issue: Volume: Page:126-140
ISSN:1865-0929
Container-title:Communications in Computer and Information Science
language:
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Author:

Siddamal Saroja V.^ORCID,Shirol Suhas B.,Hiremath Shraddha,Iyer Nalini C.

Publisher

Springer Singapore

Link

http://link.springer.com/content/pdf/10.1007/978-981-32-9767-8_11

Reference16 articles.

1. Kalra, P.K., Mudenagudi, U., Banerjee, S.: Space-time super-resolution using graph-cut optimization. IEEE Trans. Pattern Anal. Mach. Intell. 33(5), 995–1008 (2011)

2. https://datasheets.maximintegrated.com/en/ds/DS1682.pdf

3. http://www.newark.com/maxim-integrated-products/ds1318e/elapsed-time-counter-binary

4. https://datasheets.maximintegrated.com/en/ds/DS1602.pdf

5. Razavi, B.: Design of analog CMOS integrated circuits (2005)

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Verifying Mixed Signal ASIC Using SVM;Lecture Notes in Electrical Engineering;2021

2. Design and Implementation of Mixed Signal ASIC-Event Logger in TSMC 0.18 µm CMOS Technology;Lecture Notes in Electrical Engineering;2021

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