Realization of Efficient Architectures for Digital Filters: A Survey

Author:

Kumar PrashantORCID,Shrivastava Prabhat Chandra,Tiwari Manish,Dhawan Amit

Publisher

Springer Singapore

Reference31 articles.

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3. Joshi, R.M., Madanayake, A., Adikari, J., Bruton, L.T.: Synthesis and array processor realization of a 2-D IIR beam filter for wireless applications. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 20(12), 2241–2254 (2012)

4. Swamy, M.N.S., Rajan, P.K.: Symmetry in 2-D Filters and Its Application, Multidimensional Systems: Techniques and Applications (S.G. Tzafestas, Ed.). Marcel Dekkar, New York (1986). Chap. 9

5. Wijenayake, C.K., Madanayake, A., Bruton, L.T.: FPGA prototypes of differential-form 2D-IIR systolic-array DSP architectures for multi-beam plane-wave filters In: Proceedings IEEE SIPS, pp. 58–63. San Francisco, CA (2010)

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