Compiler Optimizing for Power Efficiency of On-Chip Memory

Author:

Wu Wei,Zhu Qi,Wang Fei,Lin Rong-Fen,Qi Feng-Bin

Publisher

Springer Singapore

Reference28 articles.

1. Hemsoth, N.: Future challenges of large-scale computing. http://www.hpcwire.com/2013/04/15/future_challenges_of_large-scale_computing. Accessed 02 Mar 2020

2. The Green500 list – November 2019. http://www.green500.org/greenlists. Accessed 02 Mar 2020

3. Hasan, J., Jalote, A., Vijaykumar, T.N., Brodley, C.E.: Heat stroke: power-density-based denial of service in SMT. In: 11th International Symposium on High-Performance Computer Architecture, San Francisco, CA, USA, pp. 166–177. IEEE (2005)

4. de Lima, E.D., de Souza Xavier, T.C., da Silva, A.F., Ruiz, L.B.: Compiling for performance and power efficiency. In: 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Karlsruhe, Germany, pp. 142–149. IEEE (2013)

5. Hassan, H.H., Moussa, A.S., Farag, I.: Performance vs. power and energy consumption: impact of coding style and compiler. Int. J. Adv. Comput. Sci. Appl. 8(12), 132–142 (2017)

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