Author:
Luo Li,Zhou Li,Zhou Hailiang,Feng Quanyou,Pan Guoteng
Reference14 articles.
1. Hill, M.D., Sorin, D.J., Wood, D.A.: A Primer on Memory Consistency and Cache Coherence. Synthesis Lectures on Computer Architecture, November 2011
2. Simoni, R., Horowitz, M.: Modeling the performance of limited pointers directories for cache coherence. In: Proceedings of the 18th International Symposium on Computer Architecture, pp. 309–318 (1991)
3. Nativ, G., Mittennaier, S., Ur, S., Ziv, A.: Cost evaluation of coverage directed test generation for the IBM mainframe. In: Proceeding of the 2001 International Test Conference, Baltmore, pp. 793–802 (2001)
4. Fine, S., Ziv, A.: Coverage directed test generation for functional verification using Bayesian networks. In: Design Automation Conference, pp. 286–291 (2003)
5. Braun, M., Fine, S., Ziv, A.: Enhancing the efficient of Bayesian network based coverage directed test generation. In: Proceedings of IEEE International High-Level Design and Test Workshop, Sonoma, pp. 75–80 (2004)