Assessing the Performance and Suitability of FPGAs as Hardware Accelerator for Software Programmers

Author:

Mishra Adarsh,Ajith K. J.,Bhatt Kislay,Vaibhav Kumar,Duggal Vibhuti

Publisher

Springer Nature Singapore

Reference16 articles.

1. Feist T (2012) White paper: Vivado design suite. (xilinx) Retrieved from https://www.xilinx.com/support/documentation/white_papers/wp416-Vivado-DesignSuite.pdf

2. Czajkowski T, Aydonat U, Denisenko D, Freeman J, Kinsner M, Neto D, Wong J, Yiannacouras P, Singh D (2012) From opencl to high-performance hardware on FPGAS. In: 22nd international conference on field programmable logic and applications (FPL), pp 531–534

3. The OpenCL Specification (n.d.) Retrieved 13 Oct 2021, from https://www.khronos.org/registry/OpenCL/specs/opencl-1.0.pdf

4. Xilinx (2018) SDAccel environment user guide. ( Xilinx Inc) Retrieved from https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1023-sdaccel-user-guide.pdf

5. Peng B, Wang T, Jin X, Wang C (2016) An accelerating solution for N-body MOND simulation with FPGA-SoC. Int J Reconfigurable Comput 2016:1–10. https://doi.org/10.1155/2016/4592780

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