Distributed Arithmetic Based Hybrid Architecture for Multiple Transforms-Reference-Cited by-同舟云学术

Distributed Arithmetic Based Hybrid Architecture for Multiple Transforms

Published:2018-11-20 Issue: Volume: Page:221-232
ISSN:1876-1100
Container-title:Lecture Notes in Electrical Engineering
language:
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Author:

Nair Meghna,Mamatha I.,Tripathi Shikha

Publisher

Springer Singapore

Link

http://link.springer.com/content/pdf/10.1007/978-981-13-2553-3_22

Reference13 articles.

1. Chen, Z., Lee, M.H.: On fast hybrid source coding design. In: IEEE International Symposium on Information Technology Convergence (ISITC), pp. 143147 (2007)

2. El Aakif, M., Belkouch, S., Chabini, N., Hassani, M.M.: Low power and fast DCT architecture using multiplier-less method. In: IEEE Conference on Faible Tension Faible Consommation (FTFC), pp. 63–66 (2011)

3. Sharma, V.K., Mahapatra, K.K., Pati, U.C.: An efficient distributed arithmetic based VLSI architecture for DCT. In: 2011 IEEE International Conference on Devices and Communications (ICDeCom), pp. 1–5 (2011)

4. Pal, N.S., Singh, H.P.: Implementation of high speed FIR filter using serial and parallel distributed arithmetic algorithm. Int. J. Comput. Appl. 25(7), 26–32 (2011)

5. Chen, Y.H., Chang, T.Y.: A high performance video transform engine by using space time scheduling strategy. IEEE Trans. Very Large Scale Integr. VLSI Syst. 20(4), 655–664 (2012)

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