Author:
Gupta Kirti,Pandey Neeta,Gupta Maneesha
Cited by
10 articles.
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1. Design and Analysis of an Ultralow-Voltage Complementary Fold-Interleaved Multiple-Tail Current Mode Logic;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-11
2. Optimization in PFSCL Design Using Floating-Gate MOSFET;2023 Second International Conference on Trends in Electrical, Electronics, and Computer Engineering (TEECCON);2023-08-23
3. Realization of Positive Feedback Source Coupled Logic Even Parity Generator/Checker;2023 7th International Conference On Computing, Communication, Control And Automation (ICCUBEA);2023-08-18
4. Realisation of 4:2 Compressor using Dynamic MCML Variants;2023 Second International Conference on Electrical, Electronics, Information and Communication Technologies (ICEEICT);2023-04-05
5. Memristor-Based Architectures for PFSCL Circuit Realizations;Circuits, Systems, and Signal Processing;2023-03-25