1. K.B. Lakshmi, S. Tejaswi, S.C. Vamsi, B. Jeevanarani, A novel area efficient parity generator and checker circuits design using QCA, in IEEE Fifth International Conference on Inventive Computation Technologies (2020), pp. 1108–1113
2. B. Han, J. Xu, P. Chen, R. Guo, Y. Gu, Y. Ning, Y. Liu, All-optical non-inverted parity generator and checker based on semiconductor optical amplifiers. Appl. Sci. 11, 1499 (2021)
3. E. Deniz, K. Aksoy, S. Tahar, Y. Zeren, Design and verification of parity checking circuit using HOL4 theorem proving. Sigma J. Eng. Nat. Sci. 10(2), 245–252 (2019)
4. V. Shukla, O.P. Singh1, G.R. Mishra, Optimized even/odd parity generator/checker circuits with reversible logic approach. Int. J. Adv. Sci. Technol. 29(03), 12076–12085 (2020)
5. I.A. Khan, M.T. Beg, Design and analysis of low power master slave flip-flops. Informacije Midem-J. Microelectron. Electron. Compon. Mater. 43(1), 41–49 (2013)