Performance and Circuit Analysis of Independent Gate FinFET
Author:
Publisher
Springer Singapore
Link
http://link.springer.com/content/pdf/10.1007/978-981-15-8366-7_63
Reference15 articles.
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2. Colinge, J.P., Gao, M.H., Romano-Rodríguez, A., Maes, H., Claeys, C.: Silicon-on-insulator gate-all-around device. In: Proceedings of the International Electron Devices Meeting Technical Digest, Dec 1990, pp. 595–598. https://doi.org/10.1109/SOSSOI.1990.145749
3. Choi, Y., Lindert, N., Xuan, P., Tang, S., Ha, D., Anderson, E., King, T., Bokor, J., Hu, C.: Sub-20 nm CMOS FinFET technologies. In: Proceedings of the International Electron Devices Meeting Techical Digest, Dec 2001, pp. 421–424. https://doi.org/10.1109/IEDM.2001.979526
4. Jiménez, D., Iñíguez, B., Suñé, J., Marsal. L.F, Pallarès, J., Roig, J., Flores, D.: Continuous analytic I–V model for surrounding-gate MOS-FETs. IEEE Electron Device Lett. 25, 571–573 (2004). https://doi.org/10.1109/LED.2004.831902
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