Functional verification of power gated designs by compositional reasoning
Author:
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Theoretical Computer Science,Software
Link
http://link.springer.com/content/pdf/10.1007/s10703-009-0077-x.pdf
Reference9 articles.
1. Baumgartner J, Mony H, Paruthi V, Kanzelman R, Janssen G (2006) Scalable sequential equivalence checking across arbitrary design transformations. In: Proceedings 24th international conference on computer design (ICCD 2006). IEEE, New York
2. van Eijk CAJ (2000) Sequential equivalence checking based on structural similarities. IEEE Trans Comput-Aided Des Integr Circuits Syst 19(7):814–819
3. LNCS;C Eisner,2008
4. Keating M, Flynn D, Aitken R, Gibbons A, Shi K (2007) Low power methodology manual. Springer, Berlin
5. Khasidashvili Z, Skaba M, Kaiss D, Hanna Z (2004) Theoretical framework for compositional sequential hardware equivalence verification in presence of design constraints. In: Proceedings 2004 international conference on computer-aided design (ICCAD 2004). IEEE Computer Society/ACM, Los Alamitos, pp 58–65
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Automatic Correction of Dynamic Power Management Architecture in Modern Processors;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-02
2. Open SystemC Simulator with Support for Power Gating Design;International Journal of Reconfigurable Computing;2012
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